1. Technical Field
The present invention relates to a driving method of an electrophoretic display device, an electrophoretic display device, and an electronic apparatus.
2. Related Art
An active matrix electrophoretic display device is known which includes a switching transistor and a memory circuit in each pixel (see JP-A-2003-84314). The display device described in JP-A-2003-84314 has a configuration in which micro capsules having charged particles therein are attached onto a substrate in which the switching transistors or pixel electrodes are formed. An image is displayed by controlling the charged particles by the use of an electric field generated between the pixel electrodes and a common electrode interposing the micro capsules therebetween.
The inventors suggested an electrophoretic display device having a memory circuit and a switching circuit in each pixel in the previous application (see Japanese Patent Application No. 2007-087666). In the electrophoretic display device described in the previous application, it is possible to control display states of the pixels independently of image signals stored in memory circuits by the use of potentials input to first and second control lines connected to switch circuits.
However, in the electrophoretic display device described in the previous application, a leak occurs between the pixels depending on the driving mode, thereby enhancing the power consumption.
FIG. 15 is a diagram illustrating the leak between the pixels in the electrophoretic display device described in the previous application. Two adjacent pixels 40A and 40B arranged in a display area of the electrophoretic display device are shown in FIG. 15. The configurations of the pixels 40A and 40B are equal to that of a pixel 40 described in the later embodiments with reference to FIG. 2 and the details of the elements thereof will be described in the later embodiments.
The suffixes “A”, “B”, “a”, and “b” attached to the elements are used to clearly discriminate the adjacent pixels and the elements thereof.
The pixel 40A (40B) includes a driving TFT 41a (41b), a latch circuit 70a (70b), a switch circuit 80a (80b), and a pixel electrode 35a (35b). The latch circuit 70a (70b) is an SRAM (Static Random Access Memory) type latch circuit and the switch circuit 80a (80b) includes two transmission gates. Electrophoretic elements 32 are disposed on the pixel electrodes 35a and 35b connected to the switch circuits 80a and 80b, respectively, with an adhesive layer 33 interposed therebetween and a common electrode 37 is formed on the electrophoretic elements 32.
In FIG. 15, the potential S1 of the first control line 91 is in a high level VH and the potential S2 of the second control line 92 is in a low level VL. The pixel electrode 35a of the pixel 40A is supplied with the high level potential VH of the first control line 91 through the first transmission gate TG1a of the switch circuit 80a. On the other hand, the pixel electrode 35b of the pixel 40B is supplied with the low level potential VL of the second control line 92 through the second transmission gate TG2b of the switch circuit 80b. 
In this case, leak current flowing through the adhesive layer 33 attaching the pixel electrodes 25a and 35b to the electrophoretic elements 32 is generated by a transverse electric field resulting from the potential difference between the adjacent pixel electrodes 35a and 35b. That is, a leak path LP is formed which extends from the first control line 91 to the second control line 92 through the switch circuit 80a, the pixel electrode 35a, the adhesive layer 33, the pixel electrode 35b, and the switch circuit 80b. 
Since the leak current is small in the vicinity of one pixel but is generated from the entire adjacent pixels having different display gray scales, the leak current increases as a whole of the display unit, thereby enhancing the power consumption.